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CS4397
DS333F1
3
TABLE OF FIGURES
Figure 1. Serial Audio Input Timing ......................................................................... 10
Figure 2. Direct Stream Digital - Serial Audio Input Timing ..................................... 11
Figure 3. Serial Audio Input Timing ......................................................................... 12
Figure 4. I2C Control Port Timing ............................................................................ 13
Figure 5. SPI Control Port Timing ........................................................................... 14
Figure 6. Typical Connection Diagram - Hardware Mode (Control Port Mode) ....... 15
Figure 7. Control Port Timing, I2C Mode ................................................................. 27
Figure 8. Control Port Timing, SPI mode ................................................................ 27
Figure 9. Single-speed Transition Band .................................................................. 29
Figure 10.Single-speed Stopband Rejection ............................................................ 29
Figure 11.Single-speed Transition Band .................................................................. 29
Figure 12.Single-speed Frequency Response ......................................................... 29
Figure 13.Double-speed Stopband .......................................................................... 29
Figure 14.Double-speed Transition Band ................................................................. 29
Figure 15.Double-speed Transition Band ................................................................. 29
Figure 16.Double-speed Frequency Response ........................................................ 29
Figure 17.Quad-speed Stopband Rejection ............................................................. 30
Figure 18.Quad-speed Transition Band ................................................................... 30
Figure 19.Quad-speed Transition Band ................................................................... 30
Figure 20.Quad-speed Frequency Response .......................................................... 30
Figure 21.8x Interpolator Stop Band ........................................................................ 30
Figure 22.8x Interpolator Transition Band ................................................................ 30
Figure 23.8x Interpolator Transition Band ................................................................ 30
Figure 24.8x Interpolator Frequency Response ....................................................... 30
Figure 25.DSD Frequency Response ...................................................................... 31
Figure 26.DSD Transition Band ............................................................................... 31
Figure 27.DSD Transition Band ............................................................................... 31
Figure 28.De-Emphasis Curve ................................................................................. 31
Figure 29.Format 0, Left Justified ............................................................................. 32
Figure 30.Format 1, I2S ........................................................................................... 32
Figure 31.Format 2, Right Justified, 16-Bit Data ...................................................... 32
Figure 32.Format 3, Right Justified, 24-Bit Data ...................................................... 32
Figure 33.Format 4, 8x Interpolator Mode ................................................................ 32
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts/
“The I2C-Bus Specification: Version 2.0” Philips Semiconductors, December 1998.
http://www.semiconductors.philips.com
Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product infor-
mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information
contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of
any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights
of third parties. This document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of
this publication may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or
otherwise) without the prior written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no
part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical,
photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture
or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing
in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trade-
marks and service marks can be found at http://www.cirrus.com.
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